TI Keystone DSP devices
=======================

Binding status: Unstable - Subject to changes for using common shared memories

The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
sub-systems that are used to offload some of the processor-intensive tasks or
algorithms, for achieving various system level goals.

The processor cores in the sub-system usually contain additional sub-modules
like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
controller, a dedicated local power/sleep controller etc. The DSP processor
core in Keystone 2 SoCs is usually a TMS320C66x CorePac processor.

DSP Device Node:
================
Each DSP Core sub-system is represented as a single DT node. Each node has a
number of required or optional properties that enable the OS running on the
host processor (ARM CorePac) to perform the device management of the remote
processor and to communicate with the remote processor.

Required properties:
--------------------
The following are the mandatory properties:

- compatible:		Should be one of the following,
			    "ti,k2hk-dsp" for DSPs on Keystone2 Hawking/Kepler SoCs
			    "ti,k2l-dsp" for DSPs on Keystone2 Lamarr SoCs
			    "ti,k2e-dsp" for DSPs on Keystone2 Edison SoCs
			    "ti,k2g-dsp" for DSPs on Keystone2 Galileo SoCs

- reg:			Should contain an entry for each value in 'reg-names'.
			Each entry should have the memory region's start address
			and the size of the region, the representation matching
			the parent node's '#address-cells' and '#size-cells' values.

- reg-names:		Should contain strings with the following names, each
			representing a specific internal memory region, and
			should be defined in this order,
			     "l2sram", "l1pram", "l1dram"

- clocks: 		Should contain the device's input clock, and should be
			defined as per the bindings in,
			Documentation/devicetree/bindings/clock/keystone-gate.txt
			    for K2HK/K2L/K2E SoCs or,
			Documentation/devicetree/bindings/clock/ti,sci-clk.txt
			    for K2G SoC

- ti,syscon-dev:	Should be a pair of the phandle to the Keystone Device
			State Control node, and the register offset of the DSP
			boot address register within that node's address space.

- resets:		Should contain the phandle to the reset controller node
			managing the resets for this device, and a reset
			specifier. Please refer to either of the following reset
			bindings for the reset argument specifier as per SoC,
			Documentation/devicetree/bindings/reset/reset/syscon-reset.txt
			    for K2HK/K2L/K2E SoCs or,
			Documentation/devicetree/bindings/reset/reset/ti,sci-reset.txt
			    for K2G SoC

- interrupt-parent:	Should contain a phandle to the Keystone 2 IRQ controller
			IP node that is used by the ARM CorePac processor to
			receive interrupts from the DSP remote processors. See
			Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt
			for details.

- interrupts: 		Should contain an entry for each value in 'interrupt-names'.
			Each entry should have the interrupt source number used by
			the remote processor to the host processor. The values should
			follow the interrupt-specifier format as dictated by the
			'interrupt-parent' node. The purpose of each is as per the
			description in the 'interrupt-names' property.

- interrupt-names:	Should contain strings with the following names, each
			representing a specific interrupt,
			    "vring" - interrupt for virtio based IPC
			    "exception" - interrupt for exception notification

- kick-gpio: 		Should specify the gpio device needed for the virtio IPC
			stack. This will be used to interrupt the remote processor,
			and should be defined as per the bindings in,
			Documentation/devicetree/bindings/gpio/gpio.txt

Optional properties:
--------------------

- power-domains:	_required_ property only for Keystone 2 Galileo SoC.
			Should contain a phandle to a PM domain provider node,
			and a PM domain specifier as defined by the binding,
			Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt

- memory-region:	phandle to the reserved memory node to be associated
			with the remoteproc device. The reserved memory node
			can be a CMA memory node, and should be defined as
			per the bindings in
			Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt


Examples:
---------

1.
	/* K2HK DSP node in SoC DTS file */
	soc {
		dsp0: dsp0 {
			compatible = "ti,k2hk-dsp";
			reg = <0x10800000 0x00100000>,
			      <0x10e00000 0x00008000>,
			      <0x10f00000 0x00008000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			clocks = <&clkgem0>;
			ti,syscon-dev = <&devctrl 0x40>;
			resets = <&pscrst 0>;
			interrupt-parent = <&kirq0>;
			interrupts = <0 8>;
			interrupt-names = "vring", "exception";
			kick-gpio = <&dspgpio0 27 0>;
		};

	};

	/* K2HK EVM Board file */
	&dsp0 {
		memory-region = <&dsp_common_cma_pool>;
	};

2.
	/* K2G DSP node in SoC DTS file */
	soc {
		dsp0: dsp0 {
			compatible = "ti,k2g-dsp";
			reg = <0x10800000 0x00100000>,
			      <0x10e00000 0x00008000>,
			      <0x10f00000 0x00008000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			power-domains = <&k2g_pds K2G_DEV_CGEM0>;
			clocks = <&k2g_clks K2G_DEV_CGEM0 0>;
			ti,syscon-dev = <&devctrl 0x40>;
			resets = <&k2g_reset K2G_DEV_CGEM0 K2G_DEV_CGEM0_DSP0_RESET>;
			interrupt-parent = <&kirq0>;
			interrupts = <0 8>;
			interrupt-names = "vring", "exception";
			kick-gpio = <&dspgpio0 27 0>;
		};

	};

	/* K2G EVM Board file */
	&dsp0 {
		memory-region = <&dsp_common_cma_pool>;
	};