/* * This file is part of the coreboot project. * * Copyright (C) 2003 Eric Biederman * Copyright (C) 2005 Steve Magnani * Copyright (C) 2008-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include #include #include #include void arch_write_tables(uintptr_t coreboot_table) { } void bootmem_arch_add_ranges(void) { bootmem_add_range((uintptr_t)_ttb, _ttb_size, BM_MEM_RAMSTAGE); if (!IS_ENABLED(CONFIG_COMMON_CBFS_SPI_WRAPPER)) return; bootmem_add_range((uintptr_t)_postram_cbfs_cache, _postram_cbfs_cache_size, BM_MEM_RAMSTAGE); } void lb_arch_add_records(struct lb_header *header) { }