# name: SP and PC registers special uses test. # objdump: -d --prefix-addresses --show-raw-insn .*: +file format .*arm.* Disassembly of section .text: 00000000 4685 mov sp, r0 00000002 4668 mov r0, sp 00000004 b000 add sp, #0 00000006 f20d 0d00 addw sp, sp, #0 0000000a b080 sub sp, #0 0000000c f2ad 0d00 subw sp, sp, #0 00000010 4485 add sp, r0 00000012 eb0d 0d40 add.w sp, sp, r0, lsl #1 00000016 ebad 0d00 sub.w sp, sp, r0 0000001a ebad 0d40 sub.w sp, sp, r0, lsl #1 0000001e 9800 ldr r0, \[sp, #0\] 00000020 4800 ldr r0, \[pc, #0\] ; \(00000024 \) 00000022 f8d0 f000 ldr.w pc, \[r0\] 00000026 f8d0 d000 ldr.w sp, \[r0\] 0000002a f8df f000 ldr.w pc, \[pc\] ; 0000002c 0000002e f8dd d000 ldr.w sp, \[sp\] 00000032 f8dd f000 ldr.w pc, \[sp\] 00000036 f8df d000 ldr.w sp, \[pc\] ; 00000038 0000003a 9000 str r0, \[sp, #0\] 0000003c f8c0 d000 str.w sp, \[r0\] 00000040 f8cd d000 str.w sp, \[sp\] 00000044 4468 add r0, sp 00000046 eb1d 0000 adds.w r0, sp, r0 0000004a eb0d 0040 add.w r0, sp, r0, lsl #1 0000004e eb1d 0040 adds.w r0, sp, r0, lsl #1 00000052 f11d 0f00 cmn.w sp, #0 00000056 eb1d 0f00 cmn.w sp, r0 0000005a eb1d 0f40 cmn.w sp, r0, lsl #1 0000005e f1bd 0f00 cmp.w sp, #0 00000062 4585 cmp sp, r0 00000064 ebbd 0f40 cmp.w sp, r0, lsl #1 00000068 b080 sub sp, #0 0000006a f1bd 0d00 subs.w sp, sp, #0 0000006e f1ad 0000 sub.w r0, sp, #0 00000072 f1bd 0000 subs.w r0, sp, #0 00000076 b001 add sp, #4 00000078 a801 add r0, sp, #4 0000007a f11d 0d04 adds.w sp, sp, #4 0000007e f11d 0004 adds.w r0, sp, #4 00000082 f20d 0004 addw r0, sp, #4 00000086 b001 add sp, #4 00000088 f11d 0d04 adds.w sp, sp, #4 0000008c f20d 0d04 addw sp, sp, #4 00000090 4485 add sp, r0 00000092 4468 add r0, sp 00000094 eb0d 0040 add.w r0, sp, r0, lsl #1 00000098 eb1d 0d00 adds.w sp, sp, r0 0000009c eb1d 0000 adds.w r0, sp, r0 000000a0 eb1d 0040 adds.w r0, sp, r0, lsl #1 000000a4 4485 add sp, r0 000000a6 eb0d 0d40 add.w sp, sp, r0, lsl #1 000000aa eb1d 0d00 adds.w sp, sp, r0 000000ae eb1d 0d40 adds.w sp, sp, r0, lsl #1 000000b2 44ed add sp, sp 000000b4 f1ad 0000 sub.w r0, sp, #0 000000b8 f1bd 0000 subs.w r0, sp, #0 000000bc f2ad 0000 subw r0, sp, #0 000000c0 b080 sub sp, #0 000000c2 f1bd 0d00 subs.w sp, sp, #0 000000c6 f2ad 0d00 subw sp, sp, #0 000000ca b080 sub sp, #0 000000cc f1bd 0d00 subs.w sp, sp, #0 000000d0 ebad 0040 sub.w r0, sp, r0, lsl #1 000000d4 ebbd 0040 subs.w r0, sp, r0, lsl #1 000000d8 ebad 0d40 sub.w sp, sp, r0, lsl #1 000000dc ebbd 0d40 subs.w sp, sp, r0, lsl #1 000000e0 a001 add r0, pc, #4 ; \(adr r0, 000000e8 \) 000000e2 f2af 0004 subw r0, pc, #4 000000e6 f20f 0004 addw r0, pc, #4 000000ea f2af 0004 subw r0, pc, #4 000000ee f20f 0004 addw r0, pc, #4 000000f2 f2af 0004 subw r0, pc, #4 000000f6 bf00 nop 000000f8 bf00 nop 000000fa bf00 nop